About
ATRON was established as a specialized ASIC company in September 2024
ATRON is an ASIC technology company for Design House [Fabless] and Foundary.
ATRON is composed of engineers with rich experience from 130nm to 14nm Deep sub micron, and will continue to be the leader of ASIC Design Service.
ATRON will serve as a companion to semiconductor design engineers and as a leader in mass production support for semiconductor development.
ASIC Design
Design Entry
Using a hardware description language (HDL) or schematic entry.
Logic Synthesis
Produce a gate-level netlist. Logic cells and their nets connection.
DFT Implementation
Insert Test Logic for logic cells, memory, IP.
Pre-layout Simulation
Check to see if gate-level netlist design functions correctly.
Floor Planning
Arrange the blocks of the netlist on the chip.
Placement
Decide the locations of cells in a block.
CTS
Inserting buffers/inverters along the clocks path of the ASIC design to balance the clock delay.
Routing
Make the connections between cells and blocks.
Physical Verification
Ensuring a design's layout works as intended. Steps include design rule checking (DRC) and layout-versus-schematic (LVS) checks.
IR-DROP
Check to static and dynamic voltage drop.
Post-layout Simulation
Check to see the design still works with the added loads of the interconnect.
GDS Out
Delivers GDS (Graphic Database System) to the process.
Our Services
Physical Implementation
- Synthesis for Area & Timing Optimized
- SDC Clean up for Constraints error fix
- Static Timing Analysis for setup & hold & mttv & noise timing violation fix
- Simulation for function check
- Test Vector Generation
Physical Design
- FloorPlan for Area Reduced & Timing Optimized about Macro Location
- Place for Standard cells
- Clock Tree Synthesis
- Route for Physical cells connection
- IR-DROP for Static & Dynamic Power check
- RDL for BUMP Design
- Physical Verification for DRC & LVS & ESD & ANT
Design For Test
- Clock Generation for DFT
- IO MUX for DFT
- SCAN Insert & Verify for custom fault coverage target meet
- MBIST Insert & Verify for Memory Test
- IP Direct Access Test for IP Integration Design
Our Clients
Trusted by leading semiconductor companies
TSMC
Samsung
GlobalFoundries
Intel
And many more industry leaders...
Contact Us
ATRON Co., Ltd.
#408ho-670, 579 Jungbu-daero, Giheung-gu,
Yongin-si, Gyeonggi-do, Republic of Korea.
(Gugal-dong, Gangnam Plaza )
TEL. 031-202-1277
FAX. 031-202-1288
HP. 010-9975-1202
